This course will teach students the use of the VHDL language for the representation of digital signals and design of computer systems. This course comprises Introduction to VHDL: an overview of VHDL and characteristics, user interface and features, assignment statements, signal assignment, conditional signal assignment, statement generation, concurrent and sequential assignment statement. Digital Systems Design: hierarchy and modular design of digital systems, design principles, functional units, and building blocks and components, control concepts, timing concepts. Programmable devices. Modeling and Simulation: block diagram development, hierarchical schematic modeling, digital system modeling with VHDL, functional simulation of combinational and sequential circuits, flip-flop selection, timing models of digital circuit elements.